Ultra-low power receivers in highly scaled CMOS

Advancements in the integrated radios bring up the possibility of having connectivity in almost all systems capable of computing, sensing, and/or interacting. However, always-on always-connected is not feasible for many battery-constrained low power systems due to stringent power consumption limitations. Extensive duty-cycling can solve the power issue with the penalty of excess latency in the data reception, but this limits the use cases to applications only with relaxed latency requirements. Wake-up receivers (WuRX) can solve this power/latency trade-off by acting as an event-driven companion radio waiting for a simple wake-up packet/signal to activate the main communication channel while consuming orders of magnitude less power. In this talk a general overview of wake-up receivers will be given initially along with the challenges and possible design choices/architectures presented in the literature. Limitations imposed by fully on-chip integration and the impact of highly scaled CMOS technologies on architecture choices will be also covered. Possible usage of WuRX in legacy Wi-Fi protocol and potential deployment scenarios will be presented. Finally, details of a 14nm 802.11g/n complaint fully-integrated WuRX design achieving -72dBm sensitivity while consuming less than 100µW will be discussed. With the use of an asymmetric radio transceiver system other low power transmitters can be used to transmit small amounts of data over moderate range while maintaining high battery life. Other approaches also allow for low power and/or low cost operation of radio transceiver links.