Fabrication and Integration of Superconducting Qubits and Circuits
We present fabrication and integration aspects for superconducting circuits being developed under the IARPA Quantum Enhanced Optimization (QEO) program. Our approach uses flip-chip joining techniques to connect a high-coherence qubit plane to a multilayer readout and interconnect plane with a through-silicon-via (TSV) plane inserted as an intermediary. This is one approach that enables high qubit coherence, qubit control, and integrated traveling wave parametric amplifiers. We will present our progress to date and future prospects.